The present invention relates to memory control, and more particularly, to memory control methods capable of dynamically adjusting sampling points, and related circuits.
Please refer to FIG. 1. FIG. 1 illustrates a memory module 10 of a dynamic random access memory (DRAM) 12 and a controller 14 according to the related art, where the controller 14 accesses the DRAM 12 by utilizing a data signal such as a DQ signal and a data strobe signal such as a DQS signal as shown in FIG. 1. Principles and operations of the DQ signal and the DQS signal are well known to those skilled in the related art, and therefore are not explained in detail.
Typically, a manufacturer of an electronic device comprising the memory module 10 needs to combine individual components of the DRAM 12 and the controller 14 from different respective component providers, and therefore may be required to fine-tune at least one fixed delay amount for delaying the DQ signal and/or the DQS signal within the memory module 10 in order to achieve better performance of memory control. When the electronic device is sold to a reseller or an end user, the fixed delay amount will no longer be changed.
However, phases of the DQ signal and the DQS signal may fluctuate due to interference from noise or internal/external environmental reasons such as temperature variation. Therefore, it is not possible for the memory module 10, and more specifically, for the controller 14 to achieve the best performance of memory control by utilizing the fixed delay amount.